12.4.6. Data Transfer Register

The DTR consists of two separate physical registers:

The register accessed is dependent on the instruction used:

See Debug communications channel for details on the use of these registers with the DTRRXfull and DTRTXfull flags. Figure 12.6 shows the bit arrangement of both the DTRRX and DTRTX.

Figure 12.6. DTR Register format


Table 12.15 shows how the bit values correspond with the DTRRX and DTRTX functions.

Table 12.15. Data Transfer Register bit functions

BitsFieldFunction
[31:0]-

Data Transfer Register - receive (read-only for the CP14 interface).

Note

Reads of the DTRRX through the coprocessor interface cause the DTRRXfull flag to be cleared to 0. However, reads of the DTRRX through the APB interface do not affect this flag.

[31:0]-

Data Transfer Register - transmit (write-only for the CP14 interface).

Note

Writes to the DTRTX through the coprocessor interface cause the DTRTXfull flag to be set to 1. However, writes to the DTRTX through the APB interface do not affect this flag.


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