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| Home > NEON and VFP Programmers Model > About the NEON and VFP programmers model > NEON media coprocessor |
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The NEON coprocessor implements the Advanced SIMD media processing architecture. Advanced SIMD is an optional part of the ARMv7-A architecture. The components of the NEON coprocessor are:
NEON register file with 32x64-bit general-purpose registers
NEON integer execute pipeline (ALU, Shift, MAC)
NEON dual, single-precision floating-point execute pipeline (FADD, FMUL)
NEON load/store and permute pipeline
nonpipelined VFP coprocessor that implements VFPv3 data-processing floating-point operations.
The NEON coprocessor can receive up to two valid Advanced SIMD instructions per cycle from the ARM integer instruction execute unit. In addition, it can receive 32-bit MCR data from or send 32-bit MRC data to the ARM integer instruction execute unit.
The NEON coprocessor can load data from either the L1 data cache or the L2 memory system. Enable L1 data caching for best performance of the NEON coprocessor when the L2 memory system is off or not present. See c1, Auxiliary Control Register.
| Copyright © 2006-2009 ARM Limited. All rights reserved. | ARM DDI 0344I |
| Non-Confidential | |
| PDF version | |
| Home > NEON and VFP Programmers Model > About the NEON and VFP programmers model > NEON media coprocessor |