4.2.1. NEON data alignment

This section describes NEON data access, alignment and the alignment qualifiers.

Alignment specifiers

In vector load and vector store operations, you can specify alignment requirements in the instruction.

Alignment faults are generated based on both memory attributes and alignment qualifiers.

When executing NEON vector accesses, the number of memory accesses (N) is determined based on the internal interface (128-bit) and the number of bytes being accessed. If no alignment qualifier is specified, the number of memory accesses is equal to N + 1. Adding alignment qualifiers improves performance by reducing extra cycles required to access memory.

Normal memory

Normal memory conforms to the following rules concerning NEON alignment qualifiers:

  • If an alignment qualifier is specified, a check is made for strict alignment based on the qualifier, independent of the A-bit setting. Table 4.1 shows the NEON alignment qualifiers:

    Table 4.1. NEON normal memory alignment qualifiers

    Alignment specifier

    Low-order address bits
    @16Address[0] = b0
    @32Address[1:0] = b00
    @64Address[2:0] = b000
    @128Address[3:0] = b0000

  • If an alignment qualifier is not specified, and A=1, the alignment fault is taken if it is not aligned to element size.

  • If an alignment qualifier is not specified, and A=0, it is treated as unaligned access.

Device memory and strongly ordered memory

Strongly ordered or device memory conforms to the following rules concerning NEON alignment qualifiers:

  • if an alignment qualifier is specified, a check is made for strict alignment based on the qualifier, independent of the A-bit setting as Table 4.1 shows

  • independent of the A bit, the alignment fault is taken if it is not aligned to element size

  • access to the external memory is handled by creating a burst sequence of element sized transfers, up to the bus width.

Copyright © 2006-2009 ARM Limited. All rights reserved.ARM DDI 0344I
Non-Confidential