6.4. MMU interaction with memory system

You can enable or disable the MMU as described in the ARM Architecture Reference Manual.

After a CP15 c1 instruction enables the MMU, the processor flushes all following instructions in the pipeline. The processor then begins refetching instructions, and the MMU performs virtual-to-physical address mapping according to the translation table descriptors in main memory.

After a CP15 c1 instruction disables the MMU, the processor flushes all following instructions in the pipeline. The processor then begins refetching instructions and uses flat address mapping. In flat address mapping, PA = VA.

The following is an example of enabling the MMU:

MRC p15, 0, r1, c1, c0, 0    ; read CP15 Register 1
ORR r1, r1, #0x1
MCR p15, 0, r1, c1, c0, 0    ; enable MMUs
Fetch translated
Fetch translated
Fetch translated
Fetch translated

The following is an example of disabling the MMU:

MRC p15, 0, r1, c1, c0, 0    ; read CP15 Register 1
BIC r1, r1, #0x1
MCR p15, 0, r1, c1, c0, 0    ; disabled
Fetch flat
Fetch flat
Fetch flat
Fetch flat
Copyright © 2006-2009 ARM Limited. All rights reserved.ARM DDI 0344I
Non-Confidential