| Copyright © 2006-2009 ARM Limited. All rights reserved. | ARM DDI 0344I |
| Non-Confidential | |
 PDF version | |
| Home > Introduction > Product revisions > r1p0-r1p1 |
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The following changes have been made in this release:
ID Register values changed to reflect product revision status:
0x411FC081
0x410330C1
The L2EN bit of the Auxiliary Control Register is banked between Nonsecure and Secure states.
SAFESHIFTRAM top-level pin added for ATPG test.
ETM and NEON configurability support added.
| Copyright © 2006-2009 ARM Limited. All rights reserved. | ARM DDI 0344I |
| Non-Confidential | |
| PDF version | |
| Home > Introduction > Product revisions > r1p0-r1p1 |