9.2.2. Read/write data bus width configuration pin

The primary input pin A64n128 of the processor determines the width of the AXI interface read/write data buses. You must ensure that this pin is driven appropriately for your system configuration.

Table 9.4 shows the supported values for A64n128.

Table 9.4. A64n128 encoding

ValueDescription
0128-bit interface
164-bit interface

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