10.1.2. Debug clocking using PCLKEN

All debug logic within the processor operates at an integer multiple of PCLK that is the same frequency as or slower than the APB clock, PCLK, using PCLKEN. Figure 10.4 shows the behavior of PCLKEN. In this figure, PCLKEN remains asserted, changing the PCLK:internal PCLK frequency ratio from 4:1 to 1:1.

Figure 10.4. Changing the PCLK-to-internal-PCLK ratio from 4:1 to 1:1


Note

If PCLKEN is not used, then it must be tied HIGH. This results in all state in the debug logic being clocked by PCLK directly.

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