12.4.1. Accessing debug registers

To access the CP14 debug registers you set Opcode_1 to 0. The rest of the fields of the coprocessor instruction determine the debug register being accessed.

Table 12.10 shows the CP14 debug register map.

Table 12.10. CP14 debug registers

CRnOp1CRmOp2CP14 debug register nameAbbreviationReference
c00c00Debug ID RegisterDIDRCP14 c0, Debug ID Register
c10c00Debug ROM Address RegisterDRARCP14 c0, Debug ROM Address Register
c20c00Debug Self Address Offset RegisterDSARCP14 c0, Debug Self Address Offset Register
c3-c150c00Reserved--
c00c10Debug Status and Control RegisterDSCRCP14 c1, Debug Status and Control Register
c1-c150c10Reserved--
c0-c150c2-c40Reserved--
c00c50Data Transfer RegisterDTRData Transfer Register
c0-c150c6-c150Reserved--
c0-c150c0-c151-7Reserved--

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