Any CDP operation involving a subnormal input when not in flush-to-zero mode. Enable flush-to-zero mode by setting the FZ bit, FPSCR[24].

Any CDP operation involving a NaN input when not in default NaN mode. Enable default NaN mode by setting the DN bit, FPSCR[25].

Any CDP operation that has the potential of generating an underflow condition when not in flush-to-zero mode.

Any CDP operation when Inexact exceptions are enabled. Enable Inexact exceptions by setting the IXE bit, FPSCR[12].

Any CDP operation that can cause an overflow while Overflow exceptions are enabled. Enable Overflow exceptions by setting the OFE bit, FPSCR[10].

Any CDP operation that involves an invalid arithmetic operation or an arithmetic operation on a signaling NaN when Invalid Operation exceptions are enabled. Enable Invalid Operation exceptions by setting the IOE bit, FPSCR[8].

A float-to-integer conversion that has the potential to create an integer that cannot be represented in the destination integer format when Invalid Operation exceptions are enabled.

determines the nature of the exception

determines if processing is required to perform the computation

calls a function to compute the result and status

transfers control to the user trap handler if the enable bit is set for a detected exception

writes the result to the destination register, updates the FPSCR register, and returns to the user code if no enabled exception is detected

passes control to the user trap handler and supplies any specified intermediate result for the exception if an enabled exception is detected.