13.6.2. Device ID code register

Purpose

Device identification. To distinguish the MP11 CPUs from other ARM processors, the DBGTAP controller ID is unique for each. This means that a DBGTAP debugger such as RealView ICE can easily see which processor it is connected to.

The default manufacturer ID for the MP11 CPUs is 0x23B.

The part number field is hard-wired inside the MP11 CPUs to 0x7B37. See c0, Main ID Register for information on how ARM semiconductor partner-specific are identified.

Length

32 bits.

Operating mode

When the ID code instruction is current, the shift section of the Device ID Code Register is selected as the serial path between CPUTDI and TDO. There is no parallel output from the ID register. The 32-bit device ID code is loaded into this shift section during the Capture-DR state. This is shifted out during Shift-DR (least significant bit first) while a don’t care value is shifted in. The shifted-in data is ignored in the Update-DR state.

Order

Figure 13.3 shows the bit order in the ID code register.

Figure 13.3. Device ID code register bit order


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