| |||
| Home > Programmers Model > Exceptions | |||
Exceptions occur whenever the normal flow of a program must be halted temporarily, for example, to service an interrupt from a peripheral. Before attempting to handle an exception, the MP11 CPU preserves the current processor state so that the original program can resume when the handler routine has finished.
If two or more exceptions occur simultaneously, the exceptions are dealt with in the fixed order given in Exception priorities.
This section describes the MPCore exception handling in:
Several enhancements are made in ARM architecture v6 to the exception model, mostly to improve interrupt latency, as follows:
New instructions are added to give a choice of stack to use for storing the exception return state after exception entry, and to simplify changes of processor mode and the disabling and enabling of interrupts.
Support for an imprecise Data Abort that behaves as an interrupt rather than as an abort, in that it occurs asynchronously relative to the instruction execution. Support involves the masking of a pending imprecise Data Abort at times when entry into Abort mode is deemed unrecoverable.