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The ARM architecture defines a set of memory types with characteristics that are suited to particular devices. There are three mutually exclusive memory type attributes:
Strongly-ordered
Device
Normal.
MPU memory regions can each be assigned a memory type attribute. Table 7.2 shows a summary of the memory types.
Table 7.2. Memory attributes summary
| Memory type attribute | Shared or Non-shared | Description |
|---|---|---|
| Strongly-ordered | - | All memory accesses to Strongly-ordered memory occur in program order. All Strongly-ordered accesses are assumed to be shared. |
| Device | Shared | For memory-mapped peripherals that several processors share. |
| Non-shared | For memory-mapped peripherals that only a single processor uses. | |
| Normal | Shared | For normal memory that is shared between several processors. |
| Non-shared | For normal memory that only a single processor uses. |
The processor L1 cache does not cache shared normal regions.
For more information on memory attributes and types, memory barriers, and ordering requirements for memory accesses, see the ARM Architecture Reference Manual.