12.5. Management registers

The Management registers define the standardized set of registers that all CoreSight components implement. This section describes these registers.

Table 12.25 shows the contents of the Management registers for the processor debug unit.

Table 12.25. Management registers

Offset (hex)Register numberAccessMnemonicDescription
0xD00-0xDFC832-895R-Processor Identification Registers. See Processor ID Registers.
0xF00960RWITCTRL Integration Mode Control Registers. See Integration Mode Control Register.
0xFA0

1000

 

CLAIMSET

Claim Tag Set Register. See Claim Tag Set Register.
0xFA41001 CLAIMCLRClaim Tag Clear Register. See Claim Tag Clear Register .
0xFB01004WLOCKACCESSLock Access Register. See Lock Access Register.
0xFB41005RLOCKSTATUSLock Status Register. See Lock Status Register.
0xFB81006RAUTHSTATUSAuthentication Status Register. See Authentication Status Register.
0xFB8-0xFC41006-1009R-Reserved.
0xFC81010RDEVIDDevice Identifier. Reserved.
0xFCC1011RDEVTYPEDevice Type Register. See Device Type Register.
0xFD0-0xFFC1012-1023R-Identification Registers. See Debug Identification Registers.

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