Advance the IT execution state bits in the SPSR before restoring SPSR to CPSR. This is so that the correct condition codes are applied to the next instruction on return. The pseudo-code for advancing the IT bits is:

Mask = SPSR[11,10,26,25];if (Mask != 0) {   Mask = Mask << 1;   SPSR[12,11,10,26,25] = Mask;   }if (Mask[3:0] == 0) {   SPSR[15:12] = 0;}

Obtain the instruction that caused the Undefined Instruction exception and return correctly after it. Exception handlers must also be aware of the potential for both 16-bit and 32-bit instructions in Thumb state.

After testing the SPSR and determining the instruction was executed in Thumb state, the Undefined handler must use the following pseudo-code or equivalent to obtain this information:

addr = R14_undef - 2
instr = Memory[addr,2]
if (instr >> 11) > 28 { /* 32-bit instruction */
   instr = (instr << 16) | Memory[addr+2,2]
   if (emulating) {/*so return after instruction wanted */
   R14_undef += 2 // 
} // 
}

After this, instr holds the instruction (in the range 0x0000-0xE7FF for a 16-bit instruction, 0xE8000000-0xFFFFFFFF for a 32-bit instruction), and the exception can be returned from using a MOVS PC, R14 to return after it.