4.3.5. c0, MPU Type Register

The MPUIR characteristics are:

Purpose

Holds the value for the number of instruction and data memory regions implemented in the processor.

Usage constraints

The MPUIR is:

  • a read-only register

  • accessible in Privileged mode only.

Configurations

Available in all processor configurations.

Attributes

Figure 4.10 shows the MPUIR bit assignments.

Figure 4.10. MPUIR Register bit assignments

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Table 4.6 shows the MPUIR bit assignments.

Table 4.6. MPUIR Register bit assignments

Bits NameFunction
[31:16]-SBZ.
[15:8]DRegionSpecifies the number of unified MPU regions. Set to 0, 8 or 12 data MPU regions.
[7:1]-SBZ.
[0]S

Specifies the type of MPU regions, unified or separate, in the processor.

Always set to 0, the processor has unified memory regions.


To access the MPUIR, read CP15 with:

MRC p15, 0, <Rd>, c0, c0, 4 ; Returns MPU information
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