Cortex-R4 and Cortex-R4F Technical Reference ManualRevision: r1p4
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6.3.5. c9, Software Increment Register

The PMSWINC Register characteristics are:

Purpose

Increments the count of an Event Count Register.

Usage constraints

The PMSWINC Register is:

  • A write-only register that Reads-As-Zero

  • Accessible in:

  • You must only use the PMSWINC Register to increment Event Count Registers when the counter event is set to 0x00, software count, in the Event Select Register, see c9, Event Type Selection Register.

  • If you attempt to use the PMSWINC Register to increment an Event Count Register when the counter event is set to a value other than 0x00 the result is Unpredictable.

Configurations

Available in all processor configurations.

Attributes

See Table 6.6.

Figure 6.5 shows the PMSWINC bit assignments.

Figure 6.5. PMSWINC Register bit assignments

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Table 6.6shows the PMSWINC bit assignments.

Table 6.6. PMSWINC Register bit assignments

BitsNameFunction

[31:3]

-

RAZ on reads, SBZP on writes

[2]

P2

Increment Counter 2

[1]

P1

Increment Counter 1

[0]

P0

Increment Counter 0


To access the PMSWINC Register, read or write CP15 with:

MRC p15, 0, <Rd>, c9, c12, 4 ; Read  PMSWINC Register
MCR p15, 0, <Rd>, c9, c12, 4 ; Write PMSWINC Register
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