4.1.5. System performance monitor

The performance monitor registers:

The system performance monitor consists of 12 read/write registers. Figure 4.5 shows the arrangement of registers in this functional group.

Figure 4.5. System performance monitor registers

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System performance monitoring counts system events, such as cache misses, pipeline stalls, and other related features to enable system developers to profile the performance of their systems. It can generate interrupts when the number of events reaches a given value.

For more information on the programmers model of the performance counters see the ARM Architecture Reference Manual. See Chapter 6 Events and Performance Monitor for more information on the registers.

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