8.3.2. Fault status information

When an abort occurs, information about the cause of the fault is recorded in a number of registers, depending on the type of abort:

Abort exceptions

The following registers are updated when any abort exception is taken:

Link Register

The r14_abt register is updated to provide information about the address of the instruction that the exception was taken on, in a similar way to other types of exception. See Exceptions for more information. This information can be used to resume program execution after the abort is handled.

Note

When a prefetch abort has occurred, ARM recommends that you do not use the link register value for determining the aborting address, because 32-bit Thumb instructions do not have to be word aligned and can cause an abort on either halfword. This applies even if all of the code in the system does not use the extra 32-bit Thumb instructions introduced in ARMv6T2, because the earlier BL and BLX instructions are both 32 bits long. Use the Fault Address Register instead, as described in this section.

Saved Program Status Register

The SPSR_abt register is updated to record the state and mode of the processor when the exception was taken, in a similar way to other types of exception. See Exceptions for more information.

Fault Status Register

There are two fault status registers, one for prefetch aborts (IFSR) and one for data aborts (DFSR). These record the type of abort that occurred, and whether it occurred on a read or a write. In particular, this enables the abort handler to distinguish between synchronous aborts, asynchronous aborts, and debug events. For information about the format of this register and the encodings used, see Fault Status and Address Registers.

Synchronous abort exceptions

The following registers are updated when a synchronous abort exception is taken:

Fault Address Register

There are two fault address registers, one for prefetch aborts (IFAR) and one for data aborts (DFAR). These indicate the address of the memory access that caused the fault. See Fault Status and Address Registers.

Auxiliary Fault Status Register

There are two auxiliary fault status registers, one for prefetch aborts (AIFSR) and one for data aborts (ADFSR). These record additional information about the nature and location of the fault, including whether it was a recoverable error or not, whether it occurred in the cache or AXI master interface, ATCM or BTCM and, if appropriate, which cache way the error occurred in. The cache index is not recorded on a synchronous abort, because this information can be derived from the fault address. See Fault Status and Address Registers.

Asynchronous abort exceptions

The following register is updated when an asynchronous abort exception is taken:

Auxiliary Data Fault Status Register

The ADFSR is updated to indicate whether or not the fault was recoverable, whether it occurred in the cache, ATCM or BTCM and, if appropriate, which cache set and way the error occurred in. Because the DFAR is not updated on asynchronous aborts, asynchronous aborts cannot normally be located, except when the error occurred in the cache.

The effect of debug events on these registers is described in Debug exception.

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