2.2.4. Peripheral test wrapper

The PTW converts an arbitrary interface to an APB interface. It acts as an interface translator between the register level interface and the validation environment interface, that is, APB, AHB, AXI or memory. If you require the PTBs to occupy a very small memory area it also contains the Peripheral Test Interface Bus (PTIB).

For AXI and AHB interfaces you can use the Advanced Development Kit (ADK) bridges to generate the APB interface to directly drive the register level interface, or the PTIB. If you require an externally memory mapped option, then use a static memory to APB bridge. This is part of the PTB environment deliverables.

This section describes:

PTIB mapped

Figure 2.4 shows the implementation of the wrapper with the PTIB implementation. It translates the four word address space into the 1K word address space of the register level interface, see Peripheral test interface bus. A single PSEL signal is used for each PTB and directly maps to the PSEL at the register level interface.

Figure 2.4. PTIB mapped peripheral test wrapper

Direct mapped

Figure 2.5 shows the implementation when the register level interface is mapped directly onto the validation environment interface bus. In this scenario the PTB occupies 1K words of the validation environment interface bus. You can remove the wrapper completely in an APB based validation environment, and connect the PTB to the system APB with one PSEL for each PTB.

Figure 2.5. Direct mapped peripheral test wrapper

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