3.3.5. Direct Memory Access Controller Register

The DmaclntrControl Register is read and write. On a read, it returns the status from the corresponding direct memory flag. On a write the corresponding direct memory access flag is altered. Figure 3.5 shows the register bit assignments.

Figure 3.5. DmaclntrControl Register bit assignments

Table 3.6 lists the register bit assignments.

Table 3.6. DmaclntrControl Register bit assignments

BitName Function
[31:6]-Reserved, read undefined, write as zero.
[5]DmacRxPassEnable Dmac Rx pass through, route to external DMAC.
[4]DmacRxEnableEnable Dmac Rx emulation, emulate DMAC.
[3]DmacTxPassEnable Dmac Tx pass through, route to external DMAC.
[2]DMacTxEnableEnable Dmac Tx emulation, emulate DMAC.
[1]IntrPassEnable interrupt pass through, route to external interrupt controller.
[0]IntrEnableEnable interrupt emulation, emulate interrupt controller.
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