3.5.7. Power-Down Status register

The Power-Down Status register (PDSR) indicates the power-down status of the ETM. It is:

Figure 3.8 shows the arrangement of bits in the register.

Figure 3.8. Power-Down Status register bit assignments

Table 3.14 shows the PDSR bit assignments:

Table 3.14. Power-Down Status register bit assignments

Bit numbersValueFunction
[31:2]0Reserved, RAZ
[1]0

Sticky Register State. ETM-R4 does not support multiple power domains so this bit is RAZ.

[0]1

ETM Powered Up. The ETM Trace registers are accessible. ETM-R4 does not support multiple power domains so this bit is RAO.

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