1.1. About the macrocell

This macrocell provides instruction trace and data trace for the Cortex‑R4 microprocessor. It is compatible with Thumb® and Thumb-2.

It functions as the ETMR4 module in a CoreSight System. See the CoreSight Design Kit R4 Technical Reference Manual for more information about how a CoreSight system uses the ETMR4 module.

Figure 1.1 shows the main functional blocks and clock domains of the macrocell.

Figure 1.1. Macrocell functional blocks and clock domains

See Appendix A Signals Lists for information about the macrocell signals.

See the Embedded Trace Macrocell Architecture Specification for information about the trace protocol, and about controlling tracing using triggering and filtering resources, and ETM sharing.

Programming access to the macrocell is through the APB interface. In a CoreSight system, the APB interface connects to the Debug APB bus.

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