3.5.8. Peripheral Identification Registers

The Peripheral Identification Registers are a set of eight read-only registers, PeripheralID7 to PeripheralID0. These registers are defined in the ETM Architecture Specification. This specifies that only bits [7:0] of each register are used. This means that the eight Peripheral Identification Registers can be considered to define a single 64-bit Peripheral ID, as Figure 3.9 shows.

Figure 3.9. Mapping between the Peripheral ID Registers and the Peripheral ID value

Figure 3.10 shows the Peripheral ID fields in the single conceptual Peripheral ID register.

Figure 3.10. Peripheral ID fields

Table 3.15 shows the values of the fields when reading this set of registers. The ETM Architecture Specification gives a more detailed description of many of these fields.

Table 3.15. Peripheral Identification Registers, bit assignments

RegisterRegister numberRegister offsetBitValueDescription
PeripheralID70x3F70xFDC[31:8]-Unused, read undefined.
  [7:0]0x00Reserved for future use, RAZ.
PeripheralID60x3F60xFD8[31:8]-Unused, read undefined.
  [7:0]0x00Reserved for future use, RAZ.
PeripheralID50x3F50xFD4[31:8]-Unused, read undefined.
  [7:0]0x00Reserved for future use, RAZ.
PeripheralID40x3F40xFD0[31:8]-Unused, read undefined.
  [7:4]0x0n, where 2n is number of 4KB blocks used.
  [3:0]0x4JEP 106 continuation code.
PeripheralID30x3FB0xFEC[31:8]-Unused, read undefined.
  [7:4]0x0RevAnd (at top level). Manufacturer revision number.

Customer Modified.

0x0 indicates from ARM.

PeripheralID20x3FA0xFE8[31:8]-Unused, read undefined.
  [7:4][1] Revision Number of Peripheral. This value is the same as the Implementation revision field of the ETM ID register, see ETM ID Register.
  [3]1Always 1. Indicates that a JEDEC assigned value is used.
  [2:0]b011JEP 106 identity code [6:4].
PeripheralID10x3F90xFE4[31:8]-Unused, read undefined.
  [7:4]b0001JEP 106 identity code [3:0]

Part Number [11:8].

Upper Binary Coded Decimal (BCD) value of Device Number.

PeripheralID00x3F80xFE0[31:8]-Unused, read undefined.

Part Number [7:0].

Middle and Lower BCD value of Device Number.

[1] See the Description column for details.


In Table 3.15, the Peripheral Identification Registers are listed in order of register name, from most significant (ID7) to least significant (ID0). This does not match the order of the register offsets. Similarly, in Table 3.16 the Component Identification Registers are listed in order of register name, from most significant (ID3) to least significant (ID0).

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