3.5.3. ASIC Control Register

The ASIC Control Register, 0x003 at offset 0x00C, is a read/write register that is eight bits wide.

It is eight bits wide, and register bits [7:0] drive the ASICCTL[7:0] signal. Figure 3.4 shows the arrangement of bits in the register.

Figure 3.4. ASIC Control Register bit assignments

Table 3.10 lists how the bit values correspond with the register functions. After a reset the value of the register is Undefined.

Table 3.10. ASIC Control Register bit assignments

BitsFunction
[31:8]Reserved.
[7:0]

ASICCTL[7:0]:

when a bit in this field is set to 0 the corresponding bit of ASICCTL[7:0] is LOW

when a bit in this field is set to 1 the corresponding bit of ASICCTL[7:0] is HIGH.

Copyright © 2005, 2007 ARM Limited. All rights reserved.ARM DDI 0367B
Non-Confidential