CoreSightETM™‑R4 Technical Reference Manual

Revision: r1p0


Table of Contents

Preface
About this manual
Product revision status
Intended audience
Using this manual
Conventions
Further reading
Feedback
Feedback on this product
Feedback on this manual
1. Introduction
1.1. About the macrocell
1.2. Macrocell configuration
1.3. Product revision information
2. Implementation-defined Behavior
2.1. ETM architecture version
2.2. Implementation-defined registers
2.3. Precise TraceEnable events
2.4. Parallel instruction execution
2.5. Context ID tracing
2.6. Trace and Comparator features
2.6.1. Trace features
2.6.2. Comparator features
2.7. Interaction with the Performance Monitoring Unit, PMU
2.8. ETMR4 clocks
2.8.1. ETMR4 clock signals
2.8.2. ETMR4 clock enable signals
2.9. ETMR4 resets
2.10. PortMode and PortSize
2.11. Other Implementation-defined features of the macrocell
2.12. Restrictions and limitations
3. Programmer’s Model
3.1. About the programmer’s model
3.2. Controlling ETM programming
3.3. Programming and reading ETM registers
3.3.1. Software access using APB
3.4. Summary of ETM registers
3.4.1. List of registers in numerical order
3.4.2. Functional grouping of registers
3.5. Descriptions of Implementation-defined registers
3.5.1. ETM Control Register
3.5.2. Configuration Code Register
3.5.3. ASIC Control Register
3.5.4. ETM ID Register
3.5.5. Configuration Code Extension Register
3.5.6. Extended External Input Selection Register
3.5.7. Power-Down Status register
3.5.8. Peripheral Identification Registers
3.5.9. Component Identification Registers
3.5.10. Integration Test Registers
A. Signals Lists
A.1. ETMR4 Signals
A.1.1. The trigger signals
B. I/O Signal Timings
B.1. ETMR4 I/O timing parameters
C. Typical APB Transfers
C.1. Typical APB write transfers
C.1.1. APB write transfer with no wait states
C.1.2. APB write transfer with wait states
C.2. Typical APB read transfers
C.2.1. APB read transfers with no wait states
C.2.2. APB read transfer with wait states
C.3. APB operating states
Glossary

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The product described in this document is subject to continuous developments and improvements. All particulars of the product and its use contained in this document are given by ARM Limited in good faith. However, all warranties implied or expressed, including but not limited to implied warranties of merchantability, or fitness for purpose, are excluded.

This document is intended only to assist the reader in the use of the product. ARM Limited shall not be liable for any loss or damage arising from the use of any information in this document, or any error or omission in such information, or any incorrect use of the product.

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Confidentiality Status

This document is Non-Confidential. The right to use, copy and disclose this document may be subject to license restrictions in accordance with the terms of the agreement entered into by ARM and the party that ARM delivered this document to.

Product Status

The information in this document is final, that is for a developed product.

Revision History
Revision A18 January 2006First release, for r0p0.
Revision B23 November 2007First release for r1p0.
Copyright © 2005, 2007 ARM Limited. All rights reserved.ARM DDI 0367B
Non-Confidential