3.5.9. Component Identification Registers

The ETMCIDR0-ETMCIDR3 characteristics are:

Purpose

Identifies the ETM as a CoreSight component. For more information, see the Embedded Trace Macrocell Architecture Specification.

Usage constraints

Only bits[7:0] of each register are used. This means that ETMCIDR0-ETMCIDR3 define a single 32-bit Component ID, as Figure 3.11 shows.

Configurations

Always available.

Attributes

See the register summary in Table 3.1 and Table 3.6.

Figure 3.11 shows the mapping between ETMCIDR0-ETMCIDR3 and the single 64-bit Component ID value,

Figure 3.11. Mapping between ETMCIDR0-ETMCIDR3 and the Component ID value


Table 3.16 lists the Component ID bit assignments in the single conceptual Component ID register.

Table 3.16. ETMCIDR0-ETMCIDR3, bit assignments

RegisterRegister numberRegister offsetBitValueDescription
ETMCIDR30x3FF0xFFC[31:8]-Unused, read undefined.
   [7:0]0xB1Component identifier, bits[31:24].
ETMCIDR20x3FE0xFF8[31:8]-Unused, read undefined.
   [7:0]0x05Component identifier, bits[23:16].
ETMCIDR10x3FD0xFF4[31:8]-Unused, read undefined.
   [7:4]0x9Component class (component identifier, bits[15:12]).
   [3:0]0x0Component identifier, bits[11:8].
ETMCIDR00x3FC0xFF0[31:8]-Unused, read undefined.
   [7:0]0x0DComponent identifier, bits[7:0].

Copyright © 2005, 2007-2009 ARM Limited. All rights reserved.ARM DDI 0367C
Non-Confidential