A.5. ATB interface

Table A.5 lists the ATB signals. Clock domains, where specified, give the clock on which input signals must be generated and output signals sampled. See the CoreSight ETM‑R4 Integration Manual for information about signals and connectivity.

Table A.5. ATB signals

SignalDirectionDescriptionClock domain
AFREADYOutputATB interface FIFO flush finished.ATCLK
AFVALIDInputATB interface FIFO flush request.ATCLK
ATDATA[31:0]OutputATB interface data.ATCLK
ATID[6:0]OutputATB interface trace source ID.ATCLK
ATREADYInputATDATA can be accepted.ATCLK
ATVALIDOutput ATB interface data valid.ATCLK
ETMENOutputEnable signal for trace output from the ETM, driven by bit[11] of the ETMCR.CLK

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