2.1.6. Asynchronous APB interface

This block implements the interface to the APB, that provides access to the programmable registers. It provides address decoding and pipelining of the address and data to and from the APB. The programmable registers reside in the CLK, ATCLK and PCLKDBG clock domains and so this block manages the synchronization of the access from the APB PCLKDBG clock domain to the other two clock domains.

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