CoreSightETM™‑R4 Technical Reference Manual

Revision: r2p0


Table of Contents

Preface
About this book
Product revision status
Intended audience
Using this book
Conventions
Further reading
Feedback
Feedback on this product
Feedback on this book
1. Introduction
1.1. About the ETM-R4
1.1.1. The CoreSight debug environment
1.2. Compliance
1.3. Features
1.4. Interfaces
1.5. Configurable options
1.6. Test features
1.7. Product documentation, design flow, and architecture
1.7.1. Documentation
1.7.2. Design flow
1.7.3. Architecture and protocol information
1.8. Product revisions
2. Functional Description
2.1. About the functions
2.1.1. Processor interface
2.1.2. Trace generator
2.1.3. FIFO
2.1.4. Resources
2.1.5. ATB Interface
2.1.6. Asynchronous APB interface
2.2. Interfaces
2.3. Clocking and resets
2.3.1. ETM-R4 clock signals
2.3.2. ETM-R4 clock enable signals
2.3.3. ETM-R4 resets
2.4. Operation
2.4.1. Implementation-defined registers
2.4.2. Precise TraceEnable events
2.4.3. Parallel instruction execution
2.4.4. Context ID tracing
2.4.5. Trace and Comparator features
2.4.6. Interaction with the Performance Monitoring Unit (PMU)
2.4.7. Other implementation-defined features of the macrocell
2.5. Constraints and limitations of use
2.5.1. Trace limitations
2.5.2. PortMode and PortSize
3. Programmers Model
3.1. About the programmers model
3.2. Mode of operation
3.2.1. Controlling ETM programming
3.2.2. Programming and reading ETM registers
3.3. Data structures
3.4. Register summary
3.4.1. Functional grouping of registers
3.5. Register descriptions
3.5.1. ETM Main Control Register
3.5.2. Configuration Code Register
3.5.3. ASIC Control Register
3.5.4. ETM ID Register
3.5.5. Configuration Code Extension Register
3.5.6. Extended External Input Selection Register
3.5.7. Power-Down Status Register
3.5.8. Peripheral Identification Registers
3.5.9. Component Identification Registers
3.5.10. Integration Test Registers
A. Signal Descriptions
A.1. ETM-R4 Signals
A.2. Clocks and resets
A.3. Processor trace interface
A.4. APB interface
A.5. ATB interface
A.5.1. The trigger signals
A.6. Miscellaneous interface
A.7. Test interface
B. Input and output signal timing
B.1. ETM-R4 input and output signal timing parameters
C. Revisions
Glossary

Proprietary Notice

Words and logos marked with ® or ™ are registered trademarks or trademarks of ARM Limited in the EU and other countries, except as otherwise stated below in this proprietary notice. Other brands and names mentioned herein may be the trademarks of their respective owners.

Neither the whole nor any part of the information contained in, or the product described in, this document may be adapted or reproduced in any material form except with the prior written permission of the copyright holder.

The product described in this document is subject to continuous developments and improvements. All particulars of the product and its use contained in this document are given by ARM in good faith. However, all warranties implied or expressed, including but not limited to implied warranties of merchantability, or fitness for purpose, are excluded.

This document is intended only to assist the reader in the use of the product. ARM Limited shall not be liable for any loss or damage arising from the use of any information in this document, or any error or omission in such information, or any incorrect use of the product.

Where the term ARM is used it means “ARM or any of its subsidiaries as appropriate”.

Confidentiality Status

This document is Non-Confidential. The right to use, copy and disclose this document may be subject to license restrictions in accordance with the terms of the agreement entered into by ARM and the party that ARM delivered this document to.

Unrestricted Access is an ARM internal classification.

Product Status

The information in this document is final, that is for a developed product.

Revision History
Revision A18 January 2006First release, for r0p0
Revision B23 November 2007First release for r1p0
Revision C26 March 2009First release for r2p0
Copyright © 2005, 2007-2009 ARM Limited. All rights reserved.ARM DDI 0367C
Non-Confidential