PrimeCell® Static Memory Controller (PL350 series) Technical Reference Manual 3.1. About the programmer’s model

3.1. About the programmer’s model

The SMC has 4KB of memory allocated to it from a base address of 0x000 to a maximum address of 0xFFF. Figure 3.1 shows that the register map address range is split into five regions:

Memory controller configuration registers: Use these registers for the global configuration, and control of the operating state, of the SMC.
Chip select configuration registers: These registers hold the operating parameters of each chip select. If the SMC is not configured to support all chip selects, the corresponding registers are not implemented.
User configuration registers: These registers provide general purpose I/O for user-specific applications.
Integration test registers: Use these registers to verify correct integration of the SMC within a system, by enabling non-AMBA signals to be set and read.
PrimeCell Id registers: These registers enable the identification of system components by software.

Figure 3.1. Register map

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