PrimeCell® Static Memory Controller (PL350 series) Technical Reference ManualRevision: r2p1
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3.3.3. Set Configuration Register

The write-only memc_cfg_set Register enables the SMC to be changed to low-power state, and interrupts enabled. You cannot write to this register in the Reset state. Figure 3.8 shows the register bit assignments.

Figure 3.8. memc_cfg_set Register bit assignments

Table 3.4 lists the register bit assignments.

Table 3.4. memc_cfg_set Register bit assignments

BitsNameFunction
[31:7]-Reserved, write as zero.
[6]ecc_int_enable1

0 = No effect

1 = ECC interrupt enable, memory interface 1.

[5]ecc_int_enable0

0 = No effect

1 = ECC interrupt enable, memory interface 0.

[4:3]-Reserved, write as zero.
[2]low_power_req

0 = No effect

1 = Request the SMC to enter low-power state when it next becomes idle.

[1]int_enable1

0 = No effect

1 = Interrupt enable, memory interface 1.

[0]int_enable0

0 = No effect

1 = Interrupt enable, memory interface 0.

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