10.3.5. Watchpoint Control Registers

The WCRs contain the necessary control bits for setting:

Figure 10.3 shows the bit arrangement of the Watchpoint Control Registers.

Figure 10.3. Watchpoint Control Registers bit assignments


Table 10.8 shows how the bit values correspond with the Watchpoint Control Registers functions.

Table 10.8. Watchpoint Control Registers bit assignments

BitsNameDescription

[31:29]

-RAZ on reads, SBZP on writes.

[28:24]

Watchpoint address mask

Watchpoint address mask.

[23:21]

-RAZ on reads, SBZP on writes.

[20]

E

Enable linking bit:

0 = linking disabled

1 = linking enabled.

When this bit is set, this watchpoint is linked with the context ID holding BRP selected by the linked BRP field.

[19:16]

Linked BRP

Linked BRP number. The binary number encoded here indicates a context ID holding BRP to link this WRP with. If this WRP is linked to a BRP that is not configured for linked context ID matching, it is Unpredictable whether a watchpoint debug event is generated.

[15:14]

Secure state access control

Secure state access control. This field enables the watchpoint to be conditioned on the security state of the processor.

b00 = watchpoint matches in both Secure and Non-secure state

b01 = watchpoint only matches in Non-secure state

b10 = watchpoint only matches in Secure state

b11 = reserved.

[13]

-RAZ on reads, SBZP on writes.

[12:9]

-RAZ/WI
[8:5]Byte address select

Byte address select. The WVR is programmed with word-aligned address. You can use this field to program the watchpoint so it only hits if certain byte addresses are accessed.

[4:3]

L/S

Load/store access. The watchpoint can be conditioned to the type of access being done.

b00 = reserved

b01 = load, load exclusive, or swap

b10 = store, store exclusive or swap

b11 = either.

SWP and SWPB trigger a watchpoint on b01, b10, or b11. A load exclusive instruction triggers a watchpoint on b01 or b11. A store exclusive instruction triggers a watchpoint on b10 or b11 only if it passes the local monitor within the processor.[a]

[2:1]

SP

Privileged access control. The watchpoint can be conditioned to the privilege of the access being done:

b00 = reserved

b01 = privileged, match if the processor does a privileged access to memory

b10 = User, match only on nonprivileged accesses

b11 = either, match all accesses.

Note

For all cases, the match refers to the privilege of the access, not the mode of the processor.

[0]

W

Watchpoint enable:

0 = watchpoint disabled, reset value

1 = watchpoint enabled.

[a] A store exclusive can generate an MMU fault or cause the processor to take a data watchpoint exception regardless of the state of the local monitor.


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