1.2. Cortex-A9 variants

Cortex-A9 processors can be used in both a uniprocessor configuration and multiprocessor configurations.

In the multiprocessor configuration, up to four Cortex-A9 processors are available in a cache-coherent cluster, under the control of a Snoop Control Unit (SCU), that maintains L1 data cache coherency.

The Cortex-A9 MPCore multiprocessor has:

See the Cortex-A9 MPCore Technical Reference Manual for more information.

The following system registers have Cortex-A9 MPCore uses:

Some PMU event signals have Cortex-A9 MPCore uses. See Performance monitoring signals.

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