2.5. Reset

The Cortex-A9 processor has the following reset inputs:

nCPURESET

The nCPURESET signal is the main Cortex-A9 processor reset. It initializes the Cortex-A9 processor logic and the FPU logic including the FPU register file when the MPE or FPU option is present.

nNEONRESET

The nNEONRESET signal is the reset that controls the NEON SIMD independently of the main Cortex-A9 processor reset.

nDBGRESET

The nDBGRESET signal is the reset that initializes the debug logic. See Chapter 10 Debug.

All of these are active-LOW signals.

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