Cortex-A9 Technical Reference Manual: 4.2.5. Multiprocessor Affinity Register

4.2.5. Multiprocessor Affinity Register

The MPIDR characteristics are:

Purpose

To identify:

whether the processor is part of a Cortex-A9 MPCore implementation.
Cortex-A9 processor accesses within a Cortex-A9 MPCore processor
the target Cortex-A9 processor in a multi-processor cluster system.

Usage constraints

The MPIDR is:

only accessible in privileged mode.
common to the Secure and Non-secure states.

Configurations

Available in all configurations. The value of the U bit, bit [30], indicates if the configuration is a multiprocessor configuration or a uniprocessor configuration.

Attributes

See the register summary in Table 4.1.

Figure 4.2 shows the MPIDR bit assignments.

Figure 4.2. MPIDR bit assignments

Table 4.3 shows the MPIDR bit assignments.

Table 4.3. MPIDR bit assignments

Bits	Name	Description
[31]	-	Indicates the register uses the new multiprocessor format. This is always 1.
[30]	U bit	0 = Processor is part of a multiprocessor system. 1 = Processor is part of a uniprocessor system.
[29:12]	-	SBZ.
[11:8]	Cluster ID	Value read in CLUSTERID configuration pins. It identifies a Cortex-A9 MPCore processor in a system with more than one Cortex-A9 MPCore processor present. SBZ in a uniprocessor configuration.
[7:2]	-	SBZ.
[1:0]	CPU ID	The value depends on the number of configured processors. One Cortex-A9 processor, the CPU ID is `0x0`. Two Cortex-A9 processors, the CPU IDs are `0x0 and 0x1`. Three Cortex-A9 processors, the CPU IDs are `0x0`, `0x1`, and `0x2`. Four Cortex-A9 processors, the CPU IDs are 0x0, `0x1`, `0x2`,and `0x3`.

To access the MPIDR, use:

MRC p15,0,<Rd>,c0,c0,5; read Multiprocessor ID register

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