4.2.32. Configuration Base Address Register

The Configuration Base Address Register characteristics are:

Purpose

Takes the physical base address value at reset

Usage constraints

The Configuration Base Address Register is:

  • read and write in Secure privileged modes.

  • read only in Non-secure state.

  • read only in user mode.

Configurations

In Cortex-A9 uniprocessor implementations the base address is set to zero.

In Cortex-A9 MPCore implementations it is reset to PERIPHBASE[31:13] so that software can determine the location of the SCU registers.

Attributes

See the register summary in Table 4.27.

Figure 4.16 shows the Configuration Base Address Register bit assignments.

Figure 4.16. Configuration Base Address Register bit assignments


To access the Configuration Base Address Register, use:

MRC p15,4,<Rd>,c15,c0,0; Read Configuration Base Address Register
MCR p15,4,<Rd>,c15,c0,0; Write Configuration Base Address Register
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