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The PLEUAR characteristics are:
Controls whether PLE operations are available in User mode.
The PLEUAR is:
Common to Secure and Non-secure states
Accessible in User and Privileged modes, regardless of any configuration bit.
Only available in configurations where the Preload Engine is present, otherwise an Undefined Instruction exception is taken.
See Table 4.23.
Figure 8.4 shows the PLEUAR bit assignments.
Table 8.4 shows the PLEUAR bit assignments.
Table 8.4. PLEUAR bit assignments
| Bits | Name | Description |
|---|---|---|
| [31:1] | - | RAZ |
| [0] | U | User accessibility 1 indicates the User modes can access PLE registers and execute PLE operations. |
To access the PLEUAR, use:
MCR p15, 0, <Rt>, c11, c1, 0; Read PLEAUR
MRC p15, 0, <Rt>, c11, c1, 0; Write PLEAUR
| Copyright © 2008-2009 ARM. All rights reserved. | ARM DDI 0388E |
| Non-Confidential | |
| PDF version | |
| Home > Preload Engine > PLE control register descriptions > Preload Engine User Accessibility Register |