A.14. PTM interface signals

Table A.29 shows the PTM interface signals. These signals are present only if the PTM interface is present.

In the Input/Output column “I” indicates an input from the PTM interface to the Cortex-A9 processor. “O” indicates an output from the Cortex-A9 processor to the PTM. All these signals are in the Cortex-A9 clock domain.

Table A.29. PTM interface signals

NameI/OSource or destinationDescription

WPTCOMMIT[1:0]

OPTM device

Number of waypoints committed this cycle. It is valid to indicate a valid waypoint and commit it in the same cycle.

WPTCONTEXTID[31:0]

O

Context ID for the waypoint.

This signal must be true regardless of the condition code of the waypoint.

If the core Context ID has not been set, then WPTCONTEXTID[31:0] must report 0.

WPTENABLE

IEnable waypoint.

WPTEXCEPTIONTYPE[3:0]

O

Exception type:

b0001 = Halting debug-mode

b0010 = Secure Monitor

b0100 = Imprecise Data Abort

b0101 = T2EE trap

b1000 = Reset

b1001 = UNDEF

b1010 = SVC

b1011 = Prefetch abort/software breakpoint

b1100 = Precise data abort/software watchpoint

b1110 = IRQ

b1111 = FIQ.

WPTFLUSH

O

Waypoint flush signal.

WPTLINK

O

The waypoint is a branch and updates the link register.

Only HIGH if WPTTYPE is a direct branch or an indirect branch.

WPTPC[31:0]

OPTM device

Waypoint last executed address indicator.

This is the base Link Register in the case of an exception.

Equal to 0 if the waypoint is reset exception.

WPTT32LINK

O

Indicates the size of the last executed address when in Thumb state:

0 = 16-bit instruction

1 = 32-bit instruction.

WPTTAKEN

O

The waypoint passed its condition codes. The address is still used, irrespective of the value of this signal.

Must be set for all waypoints except branch.

WPTTARGETJBIT

O

J bit for waypoint destination.

WPTTARGETPC[31:0]

O

Waypoint target address.

Bit [1] must be zero if the T bit is zero.

Bit [0] must be zero if the J bit is zero.

The value is zero if WPTTYPE is either prohibited or debug.

WPTTARGETTBIT

O

T bit for waypoint destination

WPTTRACEPROHIBITED

OPTM device

Trace is prohibited for the current waypoint target.

Indicates entry to prohibited region. No more waypoints are traced until trace can resume.

This signal must be permanently asserted if NIDEN and DBGEN are both LOW, after the in-flight waypoints have exited the core. Either an exception or a serial branch is required to ensure that changes to the inputs have been sampled.

Only one WPTVALID cycle must be seen with WPTTRACEPROHIBITED set.

Trace stops with this waypoint and the next waypoint seen is an Isync packet.

See the CoreSight PTM Architecture Specification for a description of the packets used in trace.

WPTTYPE[2:0]

O

Waypoint Type.

b000 = Direct branch

b001 = Indirect branch

b010 = Exception

b011 = DMB/DSB/ISB

b100 = Debug entry

b101 = Debug exit

b110 = Invalid

b111 = Invalid.

Debug Entry must be followed by Debug Exit.

Note

Debug exit does not reflect the execution of an instruction.

WPTVALID

OPTM device

Waypoint is confirmed as valid.

WPTnSECURE

O

Instructions following the current waypoint are executed in Non-secure state. An instruction is in Non-secure state if the NS bit is set and the processor is not in secure monitor mode.

See About the system control coprocessor for information about security extensions.

WPTFIFOEMPTY

OThere are no speculative waypoints in the PTM interface FIFO.

See Interfaces.

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