1.8.1. Documentation

The Cortex-A9 family documentation is as follows:

Technical Reference Manual

The Technical Reference Manual (TRM) describes the functionality and the effects of functional options on the behavior of the Cortex-A9 family. It is required at all stages of the design flow. Some behavior described in the TRM might not be relevant because of the way that the Cortex-A9 processor is implemented and integrated.

  • The Cortex-A9 TRM describes the uniprocessor variant.

  • The Cortex-A9 MPCore TRM describes the multiprocessor variant of the Cortex-A9 processor.

  • The Cortex-A9 Floating-Point Unit (FPU) TRM describes the implementation-specific FPU parts of the Data Engine.

  • The Cortex-A9 NEON Media Processing Engine TRM describes the Advanced SIMD implementation-specific parts of the Data Engine.

If you are programming the Cortex-A9 processor then contact:

  • the implementer to determine the build configuration of the implementation

  • the integrator to determine the pin configuration of the SoC that you are using.

Configuration and Sign-Off Guide

The Configuration and Sign-Off Guide (CSG) describes:

  • the available build configuration options and related issues in selecting them

  • how to configure the Register Transfer Level (RTL) description with the build configuration options

  • the processes to sign off the configured design.

The ARM product deliverables include reference scripts and information about using them to implement your design. Reference methodology documentation from your EDA tools vendor complements the CSG.

The CSG is a confidential book that is only available to licensees.

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