Cortex-A9 Technical Reference ManualRevision: r2p2
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10.1.4. Processor interfaces

The Cortex-A9 processor has the following interfaces to the debug, performance monitor:

Debug registers

This interface is Baseline CP14, Extended CP14, and memory-mapped.

See Table A.27 and Table A.26

Performance monitor

This interface is CP15 based and memory-mapped. See Performance monitoring. See also Chapter 11 Performance Monitoring Unit.

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