Cortex-A9 Technical Reference Manual: 4.3.3. Multiprocessor Affinity Register

4.3.3. Multiprocessor Affinity Register

The MPIDR characteristics are:

Purpose

To identify:

whether the processor is part of a Cortex-A9 MPCore implementation
Cortex-A9 processor accesses within a Cortex-A9 MPCore processor
the target Cortex-A9 processor in a multi-processor cluster system.

Usage constraints

The MPIDR is:

only accessible in privileged mode
common to the Secure and Non-secure states.

Configurations

Available in all configurations. The value of the U bit, bit [30], indicates if the configuration is a multiprocessor configuration or a uniprocessor configuration.

Attributes

See the register summary in Table 4.2.

Figure 4.3 shows the MPIDR bit assignments.

Figure 4.3. MPIDR bit assignments

Table 4.30 shows the MPIDR bit assignments.

Table 4.30. MPIDR bit assignments

Bits	Name	Function
[31]	-	Indicates the register uses the new multiprocessor format. This is always 1.
[30]	U bit	Multiprocessing Extensions: 0 Processor is part of an MPCore cluster 1 Processor is a uniprocessor.
[29:12]	-	SBZ.
[11:8]	Cluster ID	Value read in CLUSTERID configuration pins^[a]. It identifies a Cortex-A9 MPCore processor in a system with more than one Cortex-A9 MPCore processor present. SBZ for a uniprocessor configuration.
[7:2]	-	SBZ.
[1:0]	CPU ID	Indicates the CPU number in the Cortex-A9 MPCore configuration: `0x0` Processor is CPU0 `0x1` Processor is CPU1 `0x2` Processor is CPU2 `0x3` Processor is CPU3. In the uniprocessor version this value is fixed at `0x0`.
^[a]A uniprocessor implementation does not include any CLUSTERID pins.

To access the MPIDR, read the CP15 register with:

MRC p15,0,<Rd>,c0,c0,5; read Multiprocessor ID register

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