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Table A.4 lists the SMC miscellaneous signals.
Table A.4. SMC miscellaneous signals
| Name | Type | Source/ destination | Description |
|---|---|---|---|
| smc_async0 | Input | Tie-off | AHB clock synchronous to memory clock |
| smc_msync0 | Input | Tie-off | Memory clock synchronous to AHB clock |
| smc_a_gt_m0_sync | Input | Tie-off | When HIGH, indicates that smc_aclk is greater than and synchronous to smc_mclk0 |
| smc_address_mask0_0[7:0] | Input | Tie-off | Address mask for chip select 0 |
| smc_address_match0_0[7:0] | Input | Tie-off | Address match for chip select 0 |
| smc_address_mask0_1[7:0] | Input | Tie-off | Address mask for chip select 1 |
| smc_address_match0_1[7:0] | Input | Tie-off | Address match for chip select 1 |
| smc_address_mask0_2[7:0] | Input | Tie-off | Address mask for chip select 2 |
| smc_address_match0_2[7:0] | Input | Tie-off | Address match for chip select 2 |
| smc_address_mask0_3[7:0] | Input | Tie-off | Address mask for chip select 3 |
| smc_address_match0_3[7:0] | Input | Tie-off | Address match for chip select 3 |
| smc_remap_0 | Input | Tie-off | Remap |
| smc_mux_mode_0 | Input | Tie-off | Multiplexor mode |
| smc_sram_mw_0[1:0] | Input | Tie-off | Memory width tie-off |
| smc_user_status[7:0] | Input | Tie-off | User signals to the configuration port |
| smc_user_config[7:0] | Output | System | User signals from the configuration port |
| smc_int | Output | System | Interrupt |