5.2. SMC memory initialization

Figure 5.3 to Figure 5.4 show the sequence of events that a device driver must carry out to initialize the memory controller. NAND memory devices only require the memory controller registers to be updated with parameters specific to the device.

Figure 5.3. SMC and memory initialization sheet 1 of 2

Figure 5.4. SMC and memory initialization sheet 2 of 2

Where:

x = denotes the appropriate chip select.

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