3.3.11. DMC t_rcd Register at 0x0028

The read/write dmc_ t_rcd Register sets the RAS to CAS minimum delay in memory clock cycles. It can only be read and written in the Config or Low-power state. Figure 3.16 shows the register bit assignments.

Figure 3.16. dmc_t_rcd Register bit assignments

Table 3.12 lists the register bit assignments.

Table 3.12. dmc_t_rcd Register bit assignments

Bits

Name

Function

[31:6]

-

Read undefined, write as zero

[5:3]schedule_rcdSet the RAS to CAS minimum delay in dmc_aclk cycles -3

[2:0]

t_rcdSet the RAS to CAS minimum delay in memory clock cycles
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