3.5.13. SMC PrimeCell Identification Registers <0-3> at 0x1FF0-0x1FFC

The smc_pcell_id Registers are four 8-bit wide registers, that span address locations 0xFF0-0FFC. The registers can conceptually be treated as a single register that holds a 32-bit PrimeCell ID value. You can use the register for automatic BIOS configuration. The smc_pcell_id Register is set to 0xB105F00D. The register can be accessed with one wait state. Table 3.52 lists the register bit assignments.

Table 3.52. smc_pcell_id Register bit assignments

SMC pcell_id_0-3 register
BitsValueRegisterBitsDescription
--smc_pcell_id_3[31:8]Read undefined
[31:24]0xB1smc_pcell_id_3[7:0]These bits read back as 0xB1
--smc_pcell_id_2[31:8]Read undefined
[23:16]0x05smc_pcell_id_2[7:0]These bits read back as 0x05
--smc_pcell_id_1[31:8]Read undefined
[15:8]0xF0smc_pcell_id_1[7:0]These bits read back as 0xF0
--smc_pcell_id_0[31:8]Read undefined
[7:0]0x0Dsmc_pcell_id_0[7:0]These bits read back as 0x0D

Figure 3.47 shows the register bit assignments.

Figure 3.47. smc_pcell_id Register bit assignments

The following sections describe the smc_pcell_id Registers:

Note

These registers cannot be read in the Reset state.

SMC PrimeCell Identification Register 0

The smc_pcell_id_0 Register is hard-coded and the fields within the register indicate the value. Table 3.53 lists the register bit assignments.

Table 3.53. smc_pcell_id_0 Register bit assignments

BitsNameFunction
[31:8]-Reserved, read undefined
[7:0]smc_pcell_id_0These bits read back as 0x0D

SMC PrimeCell Identification Register 1

The smc_pcell_id_1 Register is hard-coded and the fields within the register indicate the value. Table 3.54 lists the register bit assignments.

Table 3.54. smc_pcell_id_1 Register bit assignments

BitsNameFunction
[31:8]-Reserved, read undefined
[7:0]smc_pcell_id_1These bits read back as 0xF0

SMC PrimeCell Identification Register 2

The smc_pcell_id_2 Register is hard-coded and the fields within the register indicate the value. Table 3.55 lists the register bit assignments.

Table 3.55. smc_pcell_id_2 Register bit assignments

BitsNameFunction
[31:8]-Reserved, read undefined
[7:0]smc_pcell_id_2These bits read back as 0x5

SMC PrimeCell Identification Register 3

The smc_pcell_id_3 Register is hard-coded and the fields within the register indicate the value. Table 3.56 lists the register bit assignments.

Table 3.56. smc_pcell_id_3 Register bit assignments

BitsNameFunction
[31:8]-Reserved, read undefined
[7:0]smc_pcell_id_3These bits read back as 0xB1
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