2.4.2. AHB to APB bridge operation

The internal memory controllers each have an APB configuration port. The AHB configuration port is mapped to these controllers using an AHB to APB bridge. Figure 2.11 shows that each internal memory controller configuration port has a 4KB address space.

Figure 2.11. AHBC memory map

The other fourteen 4KB regions are read as zero. The lower 16 bits of the AHB address decode the memory controller that is being used. An external AHB decoder determines where in the system memory map, this 64KB region is located. See About the programmer’s model for information on the internal memory controller configuration registers. The configuration ports of the internal memory controllers are APB, so only word reads and writes are supported.

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