3.5.7. SMC Set Opmode Register at 0x1018

This register is the holding register for the smc_opmode0_<0-1> working registers. The write-only smc_set_opmode Register cannot be written to in either the Reset or Low-power states. Figure 3.41 shows the register bit assignments.


Table 3.42 describes register holding, see Memory manager operation for more information.

Figure 3.41. smc_set_opmode Register bit assignments

Table 3.42 lists the register bit assignments.

Table 3.42. smc_set_opmode Register bit assignments

[31:2]-Reserved, write as zero.

Holding register for value to be written to the specific SRAM chip smc_opmode Register memory width (mw) field.

Encodes the memory data bus width:

b00 = 8 bits

b01 = 16 bits

b10 = reserved

b11 = reserved

You can program this to the configured width or half that width. See SMC Memory Interface Configuration Register at 0x1004.

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