3.3.13. DMC t_rp Register at 0x0030

The read/write dmc_t_rp Register sets the precharge to RAS delay in memory clock cycles. It can only be read and written in the Config or Low-power state. Figure 3.18 shows the register bit assignments.

Figure 3.18. dmc_t_rp Register bit assignments

Table 3.14 lists the register bit assignments.

Table 3.14. dmc_t_rp Register bit assignments

Bits

Name

Function

[31:6]

-

Read undefined, write as zero

[5:3]schedule_rpSet the precharge to RAS delay in dmc_aclk cycles -3

[2:0]

t_rpSet the precharge to RAS delay in memory clock cycles
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