PrimeCell® AHB DDR and NAND Memory Controller (PL244) Technical Reference Manual 3.3.3. DMC Direct Command Register at 0x0008

3.3.3. DMC Direct Command Register at 0x0008

The write-only dmc_direct_cmd Register passes commands to the external memory. The configuration of the dmc_direct_cmd Register enables you to write to any type of Mode register supported by the external memory device and also to generate NOP, Prechargeall, and Autorefresh commands. The dmc_direct_cmd Register therefore enables any initialization sequence that an external memory device might require. The only timing information associated with the dmc_direct_cmd Register are the command delays defined in the timing registers. Therefore, if an initialization sequence requires additional delays between commands they must be timed by the master driving the initialization sequence.

This register can only be written in the Config or Low-power state. Figure 3.8 shows the register bit assignments.

Figure 3.8. dmc_direct_cmd Register bit assignments

Table 3.4 lists the register bit assignments.

Table 3.4. dmc_direct_cmd Register bit assignments

Bits	Name	Function
[31:22]	-	Reserved, write as zero
[21:20]	chip_nmbr	Bits mapped to external memory chip address bits
[19:18]	memory_cmd	Determines the command required: b00 = Prechargeall b01 = Autorefresh b10 = Modereg or Extended modereg access b11 = NOP.
[17:16]	bank_addr	Bits mapped to external memory bank address bits when command is Modereg access
[15:14]	-	Undefined, write as zero
[13:0]	addr_13_to_0	Bits mapped to external memory address bits [13:0] when command is Modereg access

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