3.3.7. DMC t_dqss Register at 0x0018

The read/write dmc_t_dqss Register writes to DQS in memory clock cycles. It can only be read and written in the Config or Low-power state. Figure 3.12 shows the register bit assignments.

Figure 3.12. dmc_t_dqss Register bit assignments

Table 3.8 lists the register bit assignments.

Table 3.8. dmc_t_dqss Register bit assignments

Bits

Name

Function

[31:2]

-

Read undefined, write as zero

[1:0]

t_dqssWrite to DQS in memory clock cycles
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